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DS1921G
Thermochron iButton Device
Initialization
All transactions on the 1-Wire bus begin with an initial-
ization sequence. The initialization sequence consists
of a reset pulse transmitted by the bus master, followed
by presence pulse(s) transmitted by the slave(s). The
presence pulse lets the bus master know that the
DS1921G is on the bus and is ready to operate. For
more details, see the 1-Wire Signaling section.
ROM Function Commands
Once the bus master has detected a presence, it can
issue one of the seven ROM function commands. All
ROM function commands are 8 bits long. A list of these
commands follows (see the flowchart in Figure 13).
Read ROM [33h]
This command allows the bus master to read the
DS1921G’s 8-bit family code, unique 48-bit serial num-
ber and 8-bit CRC. This command can only be used if
there is a single slave on the bus. If more than one
slave is present on the bus, a data collision occurs
when all slaves try to transmit at the same time (open
drain produces a wired-AND result). The resultant fami-
ly code and 48-bit serial number result in a mismatch of
the CRC.
Match ROM [55h]
The Match ROM command, followed by a 64-bit ROM
sequence, allows the bus master to address a specific
DS1921G on a multidrop bus. Only the DS1921G that
exactly matches the 64-bit ROM sequence responds to
the memory function command. All other slaves wait for
a reset pulse. This command can be used with a single
device or multiple devices on the bus.
Search ROM [F0h]
When a system is initially brought up, the bus master
might not know the number of devices on the 1-Wire
bus or their registration numbers. By taking advantage
of the wired-AND property of the bus, the master can
use a process of elimination to identify the registration
numbers of all slave devices. For each bit of the regis-
tration number, starting with the least significant bit, the
bus master issues a triplet of time slots. On the first slot,
each slave device participating in the search outputs
the true value of its registration number bit. On the sec-
ond slot, each slave device participating in the search
outputs the complemented value of its registration num-
ber bit. On the third slot, the master writes the true
28
value of the bit to be selected. All slave devices that do
not match the bit written by the master stop participat-
ing in the search. If both of the read bits are zero, the
master knows that slave devices exist with both states
of the bit. By choosing which state to write, the bus
master branches in the ROM code tree. After one com-
plete pass, the bus master knows the registration num-
ber of a single device. Additional passes identify the
registration numbers of the remaining devices. Refer to
Application Note 187: 1-Wire Search Algorithm for a
detailed discussion, including an example.
Conditional Search ROM [ECh]
The Conditional Search ROM command operates simi-
larly to the Search ROM command except that only
devices fulfilling the specified condition participate in
the search. The condition is specified by the bit func-
tions TAS, THS, and TLS in the Control register,
address 20Eh. The Conditional Search ROM provides
an efficient means for the bus master to determine
devices on a multidrop system that have to signal an
important event, such as a temperature leaving the tol-
erance band. After each pass of the conditional search
that successfully determined the 64-bit ROM code for a
specific device on the multidrop bus, that particular
device can be individually accessed as if a Match ROM
command had been issued, since all other devices
have dropped out of the search process and are wait-
ing for a reset pulse.
For the conditional search, one can select any combi-
nation of the three search conditions by writing the
associated bit to a logical 1. These bits correspond
directly to the flags in the Status register of the device.
If the flag in the Status register reads 1 and the corre-
sponding bit in the Control register is a logical 1 too,
the device responds to the Conditional Search ROM
command. If more than one bit search condition is
selected, the first event that occurs makes the device
respond to the Conditional Search ROM command.
Skip ROM [CCh]
This command can save time in a single-drop bus sys-
tem by allowing the bus master to access the memory
functions without providing the 64-bit ROM code. If
more than one slave is present on the bus and, for
example, a read command is issued following the Skip
ROM command, data collision occurs on the bus as
multiple slaves transmit simultaneously (open-drain
pulldowns produce a wired-AND result).
Maxim Integrated
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功能描述:iButton RoHS:否 存储类型:SRAM 存储容量:512 B 组织: 工作电源电压:3 V to 5.25 V 接口类型:1-Wire 最大工作温度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封装 / 箱体:F5 MicroCan 制造商:Maxim Integrated
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功能描述:iButton
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功能描述:iButton
RoHS:否 存储类型:SRAM 存储容量:512 B 组织: 工作电源电压:3 V to 5.25 V 接口类型:1-Wire 最大工作温度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封装 / 箱体:F5 MicroCan 制造商:Maxim Integrated
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功能描述:iButton
RoHS:否 存储类型:SRAM 存储容量:512 B 组织: 工作电源电压:3 V to 5.25 V 接口类型:1-Wire 最大工作温度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封装 / 箱体:F5 MicroCan 制造商:Maxim Integrated
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功能描述:iButton
RoHS:否 存储类型:SRAM 存储容量:512 B 组织: 工作电源电压:3 V to 5.25 V 接口类型:1-Wire 最大工作温度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封装 / 箱体:F5 MicroCan 制造商:Maxim Integrated
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